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MFC r350546
  Because of AArch64's weak memory consistency model, we need to include a
  memory barrier between the stores for initializing a page table page and
  the store for adding that page to the page table.  Otherwise, a page table
  walk by another processor's MMU could see the page table page before it
  sees the initialized entries.

  Simplify pmap_growkernel().  In particular, eliminate an unnecessary TLB
  invalidation.

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