Displaying 1 50 of 269,557 commits (0.025s)

LLVM — llvm/trunk/lib/IR Instructions.cpp, llvm/trunk/test/Transforms/InstCombine non-integral-pointers.ll

Fix invalid ptrtoint in InstCombine

Summary:
It's unclear if this is the only thing we can do but at least this is consistent with the 
check
of address space agreement in `isBitCastable`.

The code is used at least in both instcombine and jumpthreading though
I could only find a way to trigger the invalid cast in instcombine.

Reviewers: loladiro, sanjoy, majnemer

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34335

LLVM — cfe/trunk/lib/Frontend PrecompiledPreamble.cpp, cfe/trunk/lib/Parse ParseStmtAsm.cpp

Create fewer copies of StringMaps. No functionality change intended.

LLVM — llvm/trunk/lib/Target/X86 X86Subtarget.h

[X86] Add missing override. NFC.

LLVM — llvm/trunk/include/llvm/Transforms/Utils Local.h, llvm/trunk/lib/Transforms/Scalar SimplifyCFGPass.cpp

[SimplifyCFG] delay switch condition forwarding to -latesimplifycfg

As discussed in D39011:
https://reviews.llvm.org/D39011
...replacing constants with a variable is inverting the transform done
by other IR passes, so we definitely don't want to do this early. 
In fact, it's questionable whether this transform belongs in SimplifyCFG 
at all. I'll look at moving this to codegen as a follow-up step.

LLVM — llvm/trunk/utils update_llc_test_checks.py

[utils] Support -mtriple=powerpc64

Summary: test/CodeGen/PowerPC/pr33093.ll uses both powerpc64 (big-endian) and powerpc64le 
while the former was unsupported.

Subscribers: nemanjai

Differential Revision: https://reviews.llvm.org/D39164

LLVM — llvm/trunk/lib/Target/X86 X86InstrAVX512.td

Strip trailing whitespace. NFCI.

LLVM — llvm/trunk/include/llvm/CodeGen CalcSpillWeights.h LiveIntervalAnalysis.h, llvm/trunk/include/llvm/Target TargetSubtargetInfo.h

Add logic to greedy reg alloc to avoid bad eviction chains

This fixes bugzilla 26810
https://bugs.llvm.org/show_bug.cgi?id=26810

This is intended to prevent sequences like:
movl %ebp, 8(%esp) # 4-byte Spill
movl %ecx, %ebp
movl %ebx, %ecx
movl %edi, %ebx
movl %edx, %edi
cltd
idivl %esi
movl %edi, %edx
movl %ebx, %edi
movl %ecx, %ebx
movl %ebp, %ecx
movl 16(%esp), %ebp # 4 - byte Reload

Such sequences are created in 2 scenarios:

Scenario #1:
vreg0 is evicted from physreg0 by vreg1
Evictee vreg0 is intended for region splitting with split candidate physreg0 (the reg 
vreg0 was evicted from)

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LLVM — llvm/trunk/utils/TableGen X86DisassemblerTables.cpp

[X86] More correctly support LIG and WIG for EVEX instructions in the disassembler tables.

This is similar to how we generate the VEX tables.

More fixes are still needed for the instructions that use EVEX.b (broadcast and embedded 
rounding).

LLVM — llvm/trunk/lib/Transforms/Utils SimplifyCFG.cpp, llvm/trunk/test/Transforms/SimplifyCFG ForwardSwitchConditionToPHI.ll

[SimplifyCFG] try harder to forward switch condition to phi (PR34471)

The missed canonicalization/optimization in the motivating test from PR34471 leads to very 
different codegen:

  int switcher(int x) {
      switch(x) {
      case 17: return 17;
      case 19: return 19;
      case 42: return 42;
      default: break;
      }
      return 0;
    }

  int comparator(int x) {
    if (x == 17) return 17;
    if (x == 19) return 19;
    if (x == 42) return 42;
    return 0;
  }

For the first example, we use a bit-test optimization to avoid a series of 
compare-and-branch:
https://godbolt.org/g/BivDsw

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LLVM — cfe/trunk/include/clang/AST Decl.h DeclCXX.h, cfe/trunk/lib/Sema SemaOverload.cpp SemaTemplate.cpp

[C++17] Fix PR34970 - tweak overload resolution for class template deduction-guides in 
line with WG21's p0620r0.

In order to identify the copy deduction candidate, I considered two approaches:
  - attempt to determine whether an implicit guide is a copy deduction candidate by 
checking certain properties of its subsituted parameter during overload-resolution.
  - using one of the many bits (WillHaveBody) from FunctionDecl (that 
CXXDeductionGuideDecl inherits from) that are otherwise irrelevant for deduction guides

After some brittle gymnastics w the first strategy, I settled on the second, although to 
avoid confusion and to give that bit a better name, i turned it into a member of an 
anonymous union.

Given this identification 'bit', the tweak to overload resolution was a simple reordering 
of the deduction guide checks (in SemaOverload.cpp::isBetterOverloadCandidate), in-line 
with Jason Merrill's p0620r0 drafting which made it into the working paper.  Concordant 
with that, I made sure the copy deduction candidate is always added.


References:
See https://bugs.llvm.org/show_bug.cgi?id=34970 
See http://wg21.link/p0620r0

LLVM — llvm/trunk/lib/Target/ARM Thumb1FrameLowering.cpp ARMFrameLowering.cpp, llvm/trunk/test/CodeGen/ARM thumb1_return_sequence.ll

[ARM] Dynamic stack alignment for 16-bit Thumb

This patch implements dynamic stack (re-)alignment for 16-bit Thumb. When
targeting processors, which support only the 16-bit Thumb instruction set
the compiler ignores the alignment attributes of automatic variables and may
silently generate incorrect code.

Differential revision: https://reviews.llvm.org/D38143

LLVM — llvm/trunk/lib/Target/X86 X86DomainReassignment.cpp X86TargetMachine.cpp, llvm/trunk/test/CodeGen/X86 avx512-schedule.ll domain-reassignment.mir

[X86] Add a pass to convert instruction chains between domains.

The pass scans the function to find instruction chains that define
registers in the same domain (closures).
It then calculates the cost of converting the closure to another domain.
If found profitable, the instructions are converted to instructions in
the other domain and the register classes are changed accordingly.

This commit adds the pass infrastructure and a simple conversion from
the GPR domain to the Mask domain.

Differential Revision:
https://reviews.llvm.org/D37251

Change-Id: Ic2cf1d76598110401168326d411128ae2580a604

LLVM — llvm/trunk/lib/ExecutionEngine/RuntimeDyld RuntimeDyldELF.cpp RuntimeDyld.cpp, llvm/trunk/lib/ExecutionEngine/RuntimeDyld/Targets RuntimeDyldELFMips.cpp

[mips] Adds support for R_MIPS_26, HIGHER, HIGHEST relocations in RuntimeDyld.

Reviewers: sdardis

Subscribers: jaydeep, bhushan, llvm-commits

Differential Revision: https://reviews.llvm.org/D38314

LLVM — llvm/trunk/test/MC/Disassembler/X86 x86-64-err.txt, llvm/trunk/utils/TableGen X86DisassemblerTables.cpp X86RecognizableInstr.cpp

[X86] Teach the disassembler that some instructions use VEX.W==0 without a corresponding 
VEX.W==1 instruction and we shouldn't treat them as if VEX.W is ignored.

Fixes PR11304.

LLVM — llvm/trunk/lib/Target/X86 X86InstrAVX512.td

[X86] Add VEX_WIG to applicable AVX512 instructions.

This should be NFC. Will be used in future patches to fix disassembler bugs.

LLVM — llvm/trunk/lib/Target/X86 X86InstrSSE.td

[X86] Add VEX_WIG to VROUNDSSrr/VROUNDSSrm/VROUNDSDrr/VROUNDSDrm

LLVM — llvm/trunk/lib/Target/X86/Disassembler X86DisassemblerDecoder.cpp, llvm/trunk/test/MC/Disassembler/X86 gather-novsib.txt

[X86] Don't allow gather/scatter to disassembler if memory operand does not use a SIB 
byte.

Fixes PR34998.

LLVM — lld/trunk/ELF InputSection.cpp

Simplify.
Delta File
+9 -11 lld/trunk/ELF/InputSection.cpp
+9 -11 1 file

LLVM — lld/trunk/ELF InputSection.cpp InputSection.h

Assume that mergeable input sections are smaller than 4 GiB.

By assuming that mergeable input sections are smaller than 4 GiB,
lld's memory usage when linking clang with debug info drops from
2.788 GiB to 2.019 GiB (measured by valgrind, and that does not include
memory space for mmap'ed files). I think that's a reasonable assumption
given such a large RAM savings, so this patch.

According to valgrind, gold needs 3.54 GiB of RAM to do the same thing.

NB: This patch does not introduce a limitation on the size of
output sections. You can still create sections larger than 4 GiB.

LLVM — cfe/trunk/bindings/python/clang cindex.py, cfe/trunk/bindings/python/tests/cindex test_location.py

[libclang, bindings]: add spelling location

 o) Add a 'Location' class that represents the four properties of a
    physical location

 o) Enhance 'SourceLocation' to provide 'expansion' and 'spelling'
    locations, maintaining backwards compatibility with existing code by
    forwarding the four properties to 'expansion'.

 o) Update the implementation to use 'clang_getExpansionLocation'
    instead of the deprecated 'clang_getInstantiationLocation', which
    has been present since 2011.

 o) Update the implementation of 'clang_getSpellingLocation' to actually
    obtain spelling location instead of file location.

LLVM — llvm/trunk/lib/Target/X86 X86InstrInfo.cpp

Strip trailing whitespace. NFCI.

LLVM — cfe/trunk/include/clang/Driver Options.td, cfe/trunk/lib/Driver/ToolChains Clang.cpp

Fix a typo with -fno-double-square-bracket-attributes and add a test to demonstrate that 
it works as expected in C++11 mode. Additionally corrected the handling of 
-fdouble-square-bracket-attributes to be properly passed down to the cc1 option.

LLVM — llvm/trunk/lib/Target/X86 X86InstrInfo.cpp, llvm/trunk/test/CodeGen/X86 widen_load-3.ll extractelement-index.ll

[X86][SSE] Add extractps/pextrd equivalence to domain tables

Differential Revision: https://reviews.llvm.org/D39135

LLVM — llvm/trunk/lib/Target/X86/Disassembler X86Disassembler.cpp X86DisassemblerDecoder.cpp, llvm/trunk/test/MC/Disassembler/X86 x86-64.txt

[X86] Fix disassembling of EVEX instructions to stop accidentally decoding the SIB index 
register as an XMM/YMM/ZMM register.

This introduces a new operand type to encode the whether the index register should be 
XMM/YMM/ZMM. And new code to fixup the results created by readSIB.

This has the nice effect of removing a bunch of code that hard coded the name of every 
GATHER and SCATTER instruction to map the index type.

This fixes PR32807.

LLVM — llvm/trunk/lib/Target/Hexagon HexagonISelDAGToDAG.cpp

Fix MSVC 'result of 32-bit shift implicitly converted to 64 bits' warning. NFCI.

LLVM — llvm/trunk/lib/Target/PowerPC PPCInstrInfo.td, llvm/trunk/test/CodeGen/PowerPC testBitReverse.ll

[PPC CodeGen] Fix the bitreverse.i64 intrinsic.

Summary: The two 32-bit words were swapped.

Subscribers: nemanjai, kbarton

Differential Revision: https://reviews.llvm.org/D38705

LLVM — cfe/trunk/docs ReleaseNotes.rst

Add release notes for the recent -fdouble-square-bracket-attributes and 
-fno-double-square-bracket-attributes compiler flags.
Delta File
+7 -0 cfe/trunk/docs/ReleaseNotes.rst
+7 -0 1 file

LLVM — cfe/trunk/lib/Sema SemaChecking.cpp, cfe/trunk/test/Sema tautological-constant-enum-compare.c outof-range-enum-constant-compare.c

[Sema] Fixes for enum handling for tautological comparison diagnostics

Summary:
As Mattias Eriksson has reported in PR35009, in C, for enums, the underlying type should
be used when checking for the tautological comparison, unlike C++, where the enumerator
values define the value range. So if not in CPlusPlus mode, use the enum underlying type.

Also, i have discovered a problem (a crash) when evaluating tautological-ness of the 
following comparison:
```
enum A { A_a = 0 };
if (a < 0) // expected-warning {{comparison of unsigned enum expression < 0 is always 
false}}
return 0;
```
This affects both the C and C++, but after the first fix, only C++ code was affected.
That was also fixed, while preserving (i think?) the proper diagnostic output.

And while there, attempt to enhance the test coverage.
Yes, some tests got moved around, sorry about that :)

Fixes PR35009

Reviewers: aaron.ballman, rsmith, rjmccall


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LLVM — cfe/trunk/include/clang/Basic AttrDocs.td

Fixing broken attribute documentation for __attribute__((noescape)); a code block was 
missing and the existing code block was missing a mandatory newline.

LLVM — llvm/trunk/lib/Analysis ValueTracking.cpp

[ValueTracking] Remove unnecessary temporary APInt from computeNumSignBitsVectorConstant.

We can just use getNumSignBits instead of inverting negative numbers.

LLVM — llvm/trunk/lib/Analysis ValueTracking.cpp

[ValueTracking] Simplify the known bits code for constant vectors a little.

Neither of these cases really require a temporary APInt outside the loop. For the 
ConstantDataSequential case the APInt will never be larger than 64-bits so its fine to 
just call getElementAsAPInt. For ConstantVector we can get the APInt by reference and only 
make a copy where the inversion is needed.

LLVM — cfe/trunk/bindings/python/clang cindex.py, cfe/trunk/bindings/python/tests/cindex test_index.py

[bindings] allow null strings in Python 3

Some API calls accept 'NULL' instead of a char array (e.g. the second
argument to 'clang_ParseTranslationUnit').  For Python 3 compatibility,
all strings are passed through 'c_interop_string' which expects to
receive only 'bytes' or 'str' objects.  This change extends this
behavior to additionally allow 'None' to be supplied.

A test case was added which breaks in Python 3, and is fixed by this
change.  All the test cases pass in both, Python 2 and Python 3.

LLVM — cfe/trunk README.txt

Test commit
Delta File
+4 -4 cfe/trunk/README.txt
+4 -4 1 file

LLVM — llvm/trunk/test/CodeGen/X86 sse41-schedule.ll

[X86][SSE] Add missing extractps scheduling test

LLVM — llvm/trunk/lib/Transforms/Scalar LoopInterchange.cpp, llvm/trunk/test/Transforms/LoopInterchange phi-ordering.ll

[LoopInterchange] Fix phi node ordering miscompile.

The way that splitInnerLoopHeader splits blocks requires that
the induction PHI will be the first PHI in the inner loop
header. This makes sure that is actually the case when there
are both IV and reduction phis.

Differential Revision: https://reviews.llvm.org/D38682

LLVM — llvm/trunk/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[SelectionDAG] Use dyn_cast without cast.

LLVM — llvm/trunk/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[SelectionDAG] Use isa to silence unused variable warning (NFC).

LLVM — llvm/trunk/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[SelectionDAG] Don't subject ConstantSDNodes to the depth limit in computeKnownBits and 
ComputeNumSignBits.

We don't need to do any additional recursion, we just need to analyze the APInt stored in 
the node. This matches what the ValueTracking versions do for IR.

LLVM — llvm/trunk/lib/CodeGen/SelectionDAG TargetLowering.cpp

[SelectionDAG] Don't subject ISD:Constant to the depth limit in 
TargetLowering::SimplifyDemandedBits.

Summary:
We shouldn't recurse any further but it doesn't mean we shouldn't be able to give the 
known bits for a constant. The caller would probably like that we always return the right 
answer for a constant RHS. This matches what InstCombine does in this case.

I don't have a test case because this showed up while trying to revive D31724.

Reviewers: RKSimon, spatel

Reviewed By: RKSimon

Subscribers: arsenm, llvm-commits

Differential Revision: https://reviews.llvm.org/D38967

LLVM — llvm/trunk/lib/Target/X86 X86ISelLowering.cpp, llvm/trunk/test/CodeGen/X86 mul-i1024.ll mul-i512.ll

[X86] Do not generate __multi3 for mul i128 on X86

Summary: __multi3 is not available on x86 (32-bit). Setting lib call name for MULI_128 to 
nullptr forces DAGTypeLegalizer::ExpandIntRes_MUL to generate instructions for 128-bit 
multiply instead of a call to an undefined function.  This fixes PR20871 though it may be 
worth looking at why licm and indvars combine to generate 65-bit multiplies in that test.

Patch by Riyaz V Puthiyapurayil

Reviewers: craig.topper, schweitz

Reviewed By: craig.topper, schweitz

Subscribers: RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D38668

LLVM — llvm/trunk/include/llvm/Transforms PGOInstrumentation.h, llvm/trunk/lib/Transforms/Instrumentation PGOInstrumentation.cpp DataFlowSanitizer.cpp

[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor 
fixes (NFC).

LLVM — lld/trunk/ELF LinkerScript.cpp LinkerScript.h

Don't call buildSectionOrder multiple times.

This takes linking the linux kernel from 1.52s to 0.58s.

LLVM — cfe/trunk/test/CodeGen builtins.c

[CodeGen] add tests for __builtin_sqrt*; NFC

I don't know if this is correct, but this is what we currently do.
More discussion in PR27108 and PR27435 and D27618.
Delta File
+9 -0 cfe/trunk/test/CodeGen/builtins.c
+9 -0 1 file

LLVM — cfe/trunk/lib/Analysis BodyFarm.cpp, cfe/trunk/test/Analysis call_once.cpp

[Analyzer] Correctly handle parameters passed by reference when bodyfarming std::call_once

Explicitly not supporting functor objects.

Differential Revision: https://reviews.llvm.org/D39031

LLVM — lld/trunk/ELF Writer.cpp LinkerScript.cpp

Remove unused argument.

LLVM — cfe/trunk/include/clang/Basic DiagnosticASTKinds.td DiagnosticIDs.h, cfe/trunk/lib/AST ExprConstant.cpp

Implement current CWG direction for support of arrays of unknown bounds in
constant expressions.

We permit array-to-pointer decay on such arrays, but disallow pointer
arithmetic (since we do not know whether it will have defined behavior).

This is based on r311970 and r301822 (the former by me and the latter by Robert
Haberlach). Between then and now, two things have changed: we have committee
feedback indicating that this is indeed the right direction, and the code
broken by this change has been fixed.

This is necessary in C++17 to continue accepting certain forms of non-type
template argument involving arrays of unknown bound.

LLVM — lldb/trunk/unittests/tools/lldb-server/tests TestClient.cpp

lldb-server tests: Propagate environment variables (pr34192)

Summary:
Without this, the launching of the test inferior may fail if it depends
on some component of the environment (most likely LD_LIBRARY_PATH). This
makes sure we propagate the environment variable to the inferior
process.

Reviewers: eugene

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D39010

LLVM — llvm/trunk/include/llvm/CodeGen DFAPacketizer.h, llvm/trunk/lib/CodeGen DFAPacketizer.cpp

[Packetizer] Add function to check for aliasing between instructions