Displaying 1 50 of 285,491 commits (0.024s)

LLVM — cfe/trunk/test/Frontend fixed_point_same_fbits.c

Fixed test that failed when checking what variable a value was stored
in for fixed point types.

LLVM — llvm/trunk/lib/Target/RISCV RISCVInstrInfoF.td, llvm/trunk/test/MC/RISCV rvf-aliases-valid.s

[RISCV] Accept fmv.s.x and fmv.x.s as mnemonic aliases for fmv.w.x and fmv.x.w

These instructions were renamed in version 2.2 of the user-level ISA spec, but 
the old name should also be accepted by standard tools.

LLVM — llvm/trunk/test/DebugInfo/AArch64 machine-outliner.ll

[MachineOutliner] Add debug info test for the outliner

The outliner emits debug info. Add a test that outlines a function
and uses llvm-dwarfdump to check the emitted DWARF for correctness.

LLVM — llvm/trunk/include/llvm/Transforms/Utils Local.h, llvm/trunk/lib/Transforms/Utils Local.cpp

[Local] Generalize insertReplacementDbgValues, NFC

This utility should operate on Values, not Instructions. While I'm here,
I've also made it possible to skip emitting replacement dbg.values for
certain debug users (by having RewriteExpr return nullptr).

LLVM — llvm/trunk/test/Transforms/InstCombine shuffle_select.ll

[InstCombine] add vector select of binops tests (PR37806)

These represent the most basic requested transform - a matching
operand and 2 constant operands.

LLVM — llvm/trunk/include/llvm/Transforms/Utils OrderedInstructions.h, llvm/trunk/lib/Transforms/Utils OrderedInstructions.cpp PredicateInfo.cpp

[PredicateInfo] Order instructions in different BBs by DFSNumIn.

Using OrderedInstructions::dominates as comparator for instructions in
BBs without dominance relation can cause a non-deterministic order
between such instructions. That in turn can cause us to materialize
copies in a non-deterministic order. While this does not effect
correctness, it causes some minor non-determinism in the final generated
code, because values have slightly different labels.

Without this patch, running -print-predicateinfo on a reasonably large
module produces slightly different output on each run.

This patch uses the dominator trees DFSInNum to order instruction from
different BBs, which should enforce a deterministic ordering and
guarantee that dominated instructions come after the instructions that
dominate them.

Reviewers: dberlin, efriedma, davide

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D48230

LLVM — lldb/trunk/packages/Python/lldbsuite/test/functionalities/breakpoint/inlined_breakpoints basic_type.cpp, lldb/trunk/packages/Python/lldbsuite/test/lang/cpp/class_types main.cpp

Make test sources compatible with android+libcxx+modules

In a modules build, android is very picky about which symbols are
visible after including libc++ headers (e.g. <cstdio> defines only
std::printf and not ::printf).

This consolidates the tests where this was an issue to always include
the <c???> version of the headers and prefixes the symbols with std:: as

Apart from that, there is no functional change in the tests.

LLVM — cfe/trunk/include/clang-c Index.h, cfe/trunk/include/clang/AST Expr.h Type.h

[Fixed Point Arithmetic] Fixed Point Precision Bits and Fixed Point Literals

This diff includes the logic for setting the precision bits for each primary fixed point 
type in the target info and logic for initializing a fixed point literal.

Fixed point literals are declared using the suffixes

hr: short _Fract
uhr: unsigned short _Fract
r: _Fract
ur: unsigned _Fract
lr: long _Fract
ulr: unsigned long _Fract
hk: short _Accum
uhk: unsigned short _Accum
k: _Accum
uk: unsigned _Accum
Errors are also thrown for illegal literal values

unsigned short _Accum u_short_accum = 256.0uhk;   // expected-error{{the integral part of 
this literal is too large for this unsigned _Accum type}}

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LLVM — llvm/trunk/include/llvm/MC MCDwarf.h, llvm/trunk/lib/MC MCDwarf.cpp

[DWARF] Don't keep a ref to possibly stack allocated data.

LLVM — llvm/trunk/lib/Linker IRMover.cpp, llvm/trunk/test/LTO/X86 type-mapping-bug2.ll

IRMover: Account for matching types present across modules

Due to uniqueing of DICompositeTypes, it's possible for a type from one
module to be loaded into another earlier module without being renamed.
Then when the defining module is being IRMoved, the type can be used as
a Mapping destination before being loaded, such that when it's requested
using TypeMapTy::get() it will fail with an assertion that the type is a
source type when it's actually a type in both the source and
destination modules. Correctly handle that case by allowing a non-opaque
non-literal struct type be present in both modules.

Fix for PR37684.

Reviewers: pcc, tejohnson

Reviewed By: pcc, tejohnson

Subscribers: tobiasvk, mehdi_amini, steven_wu, llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D47898

LLVM — llvm/trunk/include/llvm/Transforms/Utils Local.h, llvm/trunk/lib/Transforms/InstCombine InstCombineCasts.cpp

[Local] Add a utility to insert replacement dbg.values, NFC

The purpose of this utility is to make it easier for optimizations to
insert replacement dbg.values for instructions they are deleting. This
is useful in situations where salvageDebugInfo is inapplicable, say,
because the new dbg.value cannot refer to an operand of the dying value.

The utility is called insertReplacementDbgValues.

It assumes that the instruction 'From' is going to be deleted, and
inserts replacement dbg.values for each debug user of 'From'. The
newly-inserted dbg.values refer to 'To' instead of 'From'. Each
replacement dbg.value has the same location and variable as the debug
user it replaces, has a DIExpression determined by the result of
'RewriteExpr' applied to an old debug user of 'From', and is placed
before 'InsertBefore'.

This should simplify future patches, like D48331.

LLVM — llvm/trunk/lib/MC/MCParser AsmParser.cpp

Remove a redundant initialization. NFC

LLVM — llvm/trunk/lib/Transforms/Vectorize SLPVectorizer.cpp

[SLPVectorizer] Move isOneOf after InstructionsState type. NFCI.

A future patch will have isOneOf use InstructionsState.

LLVM — llvm/trunk/lib/CodeGen/SelectionDAG LegalizeTypes.cpp LegalizeTypes.h, llvm/trunk/test/CodeGen/X86 legalize-types-remapid.ll

[DAG] Don't map a TableId to itself in the ReplacedValues map

Found some regressions (infinite loop in DAGTypeLegalizer::RemapId)
after r334880. This patch makes sure that we do map a TableId to

Reviewers: niravd

Reviewed By: niravd

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D48364

LLVM — lld/trunk/ELF SyntheticSections.cpp, lld/trunk/test/ELF mips-mgot.s

[ELF][MIPS] Fill a primary-GOT as much as possible

While building a Global Offset Table try to fill the primary GOT as much
as possible because the primary GOT can be accessed in the most
effective way. If it is not possible, try to fill the last GOT in the
multi-GOT list, and finally create a new GOT if both attempts failed.

LLVM — cfe/trunk/lib/Sema SemaInit.cpp

Simplify. No behavior change.
Delta File
+1 -7 cfe/trunk/lib/Sema/SemaInit.cpp
+1 -7 1 file

LLVM — llvm/trunk/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/trunk/test/CodeGen/X86 pr37820.ll

[DAG] Fix and-mask folding when narrowing loads.

Check that and masks are strictly smaller than implicit mask from
narrowed load.

Fixes PR37820.

Reviewers: samparker, RKSimon, nemanjai

Subscribers: hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D48335

LLVM — llvm/trunk/test lit.cfg.py, llvm/trunk/test/tools/gold/X86 drop-linkage.ll thinlto_archive.ll

[LIT] Enable testing of LLVM gold plugin on Mac OS X

Differential revision: https://reviews.llvm.org/D48350

LLVM — llvm/trunk/lib/Target/WebAssembly known_gcc_test_failures.txt

[WebAssembly] Update know failures for the wasm waterfall

The waterfall no longer builds .s files and no longers uses
the wasm-o when it builds object files.

Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D48371

LLVM — llvm/trunk/lib/Transforms/Vectorize SLPVectorizer.cpp

[SLPVectorizer] Use InstructionsState to record AltOpcode

This is part of a move towards generalizing the alternate opcode mechanism and not just 
supporting (F)Add/(F)Sub counterparts.

The patch embeds the AltOpcode in the InstructionsState instead of calling getAltOpcode so 

I'm hoping to eventually remove all uses of getAltOpcode and handle alternate opcode 
selection entirely within getSameOpcode, that will require us to use InstructionsState 
throughout the BoUpSLP call hierarchy (similar to some of the changes in D28907), which I 
will begin in future patches.

Differential Revision: https://reviews.llvm.org/D48359

LLVM — lldb/trunk/packages/Python/lldbsuite/test/functionalities/thread/num_threads main.cpp TestNumThreads.py

Make sure TestNumThreads works with libc++

The problem was that with libc++ the std::unique_lock declaration was
completely inlined, so there was no line table entry in the main.cpp
file to set a breakpoint on. Therefore, the breakpoint got moved to the
next line, but that meant the test would deadlock as the thread would
stop with the lock already held.

I fix that issue by adding a dummy statement before the std::unique_lock
line to anchor the breakpoint.

I think this should fix the issue because of which this test was
disabled on darwin, but someone should verify that before enabling it.

LLVM — llvm/trunk/tools/llvm-mca InstrBuilder.cpp

[llvm-mca] use APint::operator[] to obtain the bit value. NFC

LLVM — llvm/trunk/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/trunk/test/Transforms/SLPVectorizer/AArch64 transpose.ll

[SLPVectorizer] Relax "alternate" opcode vectorisation to work with any SK_Select shuffle 

D47985 saw the old SK_Alternate 'alternating' shuffle mask replaced with the SK_Select 
mask which accepts either input operand for each lane, equivalent to a vector select with 
a constant condition operand.

This patch updates SLPVectorizer to make full use of this SK_Select shuffle pattern by 
removing the 'isOdd()' limitation.

The AArch64 regression will be fixed by D48172.

Differential Revision: https://reviews.llvm.org/D48174

LLVM — llvm/trunk/lib/Analysis InstructionSimplify.cpp, llvm/trunk/test/Transforms/InstSimplify AndOrXor.ll

[InstSimplify] Fix missed optimization in simplifyUnsignedRangeCheck()

For both operands are unsigned, the following optimizations are valid, and missing:

   1. X > Y && X != 0 --> X > Y
   2. X > Y || X != 0 --> X != 0
   3. X <= Y || X != 0 --> true
   4. X <= Y || X == 0 --> X <= Y
   5. X > Y && X == 0 --> false

unsigned foo(unsigned x, unsigned y) { return x > y && x != 0; }
should fold to x > y, but I found we haven't done it right now.
besides, unsigned foo(unsigned x, unsigned y) { return x < y && y != 0; }
Has been folded to x < y, so there may be a bug.

Patch by: Li Jia He!

Differential Revision: https://reviews.llvm.org/D47922

LLVM — llvm/trunk/test/Transforms/InstSimplify AndOrXor.ll

[InstSimplify] Add tests for missed optimizations in simplifyUnsignedRangeCheck (NFC)

These are the baseline tests for the functional change in D47922.

Patch by Li Jia He!

Differential Revision: https://reviews.llvm.org/D48000

LLVM — llvm/trunk/lib/Target/RISCV RISCVInstrInfoD.td RISCVInstrInfoF.td, llvm/trunk/test/MC/RISCV rvd-aliases-valid.s rvf-aliases-valid.s

[RISCV] Add InstAlias definitions for fgt.{s|d}, fge.{s|d}

These are produced by GCC and supported by GAS, but not currently contained in 
the pseudoinstruction listing in the RISC-V ISA manual.

LLVM — llvm/trunk/test/CodeGen/X86 pr37879.ll

[X86] Adding a test for PR37879

LLVM — llvm/trunk/include/llvm/ADT DenseMapInfo.h

[ADT] Allow llvm::hash_code as DenseMap key.

This is useful when hash collisions are unlikely and acceptable, e.g. in clangd
completion ranking.

Reviewers: ioeric

Subscribers: ilya-biryukov, llvm-commits

Differential Revision: https://reviews.llvm.org/D48361

LLVM — llvm/trunk/lib/Target/Hexagon HexagonDepInstrInfo.td HexagonMapAsm2IntrinV65.gen.td

[Hexagon] Remove 'T' from HasVNN predicates, NFC

Patch by Sumanth Gundapaneni.

LLVM — llvm/trunk/lib/Target/Mips MicroMipsDSPInstrInfo.td MicroMipsDSPInstrFormats.td

[mips] Fix the predicates of some DSP instructions from AdditionalPredicates to 

Reviewers: atanasyan, abeserminji, smaksimovic

Differential Revision: https://reviews.llvm.org/D48166

LLVM — llvm/trunk/lib/Transforms/InstCombine InstCombineCalls.cpp, llvm/trunk/test/Transforms/InstCombine assume.ll

[InstCombine] ignore debuginfo when removing redundant assumes (PR37726)

This is similar to:


LLVM — llvm/trunk/lib/Target/RISCV RISCVInstrInfo.td, llvm/trunk/test/MC/RISCV rvi-aliases-valid.s

[RISCV] Add InstAlias definitions for sgt and sgtu

These are produced by GCC and supported by GAS, but not currently contained in 
the pseudoinstruction listing in the RISC-V ISA manual.

LLVM — llvm/trunk/lib/Target/ARM ARMInstrThumb.td ARMInstrThumb2.td, llvm/trunk/test/CodeGen/ARM add-like-or.ll shift-combine.ll

ARM: convert ORR instructions to ADD where possible on Thumb.

Thumb has more 16-bit encoding space dedicated to ADD than ORR, allowing both a
3-address encoding and a wider range of immediates. So, particularly when
optimizing for code size (but it doesn't make things worse elsewhere) it's
beneficial to select an OR operation to an ADD if we know overflow won't occur.

This is made even better by LLVM's penchant for putting operations in canonical
form by converting the other way.

LLVM — llvm/trunk/include/llvm/IR IntrinsicsAArch64.td, llvm/trunk/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrInfo.td

[AArch64] Implement FLT_ROUNDS macro.

Very similar to ARM implementation, just maps to an MRS.

Should fix PR25191.

Patch by Michael Brase.

LLVM — llvm/trunk/tools/llvm-exegesis/lib Assembler.cpp Target.h, llvm/trunk/tools/llvm-exegesis/lib/X86 Target.cpp CMakeLists.txt

[llvm-exegesis] Add mechanism to add target-specific passes.

createX86FloatingPointStackifierPass is disabled until we handle
TracksLiveness correctly.

Reviewers: gchatelet

Subscribers: mgorny, tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48360

LLVM — cfe/trunk/lib/StaticAnalyzer/Core Z3ConstraintManager.cpp

[analyzer] Optimize constraint generation when the range is a concrete value

If a constraint is something like:
$0 = [1,1]
it'll now be created as:
assert($0 == 1)
instead of:
assert($0 >= 1 && $0 <= 1)

In general, ~3% speedup when solving per query in my machine. Biggest improvement was when 
verifying sqlite3, total time went down from 3000s to 2200s.

I couldn't create a test for this as there is no way to dump the formula yet. D48221 adds 
a method to dump the formula but there is no way to do it from the command line.

Also, a test that prints the formula will most likely fail in the future, as different 
solvers print the formula in different formats.

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LLVM — llvm/trunk/unittests/tools/llvm-exegesis/X86 SnippetGeneratorTest.cpp

[llvm-exegesis] Fix failing test.

Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48358

LLVM — lldb/trunk/packages/Python/lldbsuite/test/expression_command/ir-interpreter TestIRInterpreter.py, lldb/trunk/source/Expression IRInterpreter.cpp

IRInterpreter: fix sign extension of small types (pr37840)

Sign-extension of small types (e.g. short) was not handled correctly.
The reason for that was that when we were assigning the a value to the
Scalar object, we would accidentally promote the type to int (even
though the assignment code in AssignTypeToMatch tried to cast the value
to the appropriate type, it would still invoke the "int" version of
operator=). Instead, I use the APInt version of operator=, where the
bitwidth is specified explicitly. Among other things, this allows us to
fold the individual size cases into one.

LLVM — llvm/trunk/include/llvm/MC MCInstrAnalysis.h, llvm/trunk/lib/MC MCInstrAnalysis.cpp

[llvm-mca][X86] Teach how to identify register writes that implicitly clear the upper 
portion of a super-register.

This patch teaches llvm-mca how to identify register writes that implicitly zero
the upper portion of a super-register.

On X86-64, a general purpose register is implemented in hardware as a 64-bit
register. Quoting the Intel 64 Software Developer's Manual: "an update to the
lower 32 bits of a 64 bit integer register is architecturally defined to zero
extend the upper 32 bits".  Also, a write to an XMM register performed by an AVX
instruction implicitly zeroes the upper 128 bits of the aliasing YMM register.

This patch adds a new method named clearsSuperRegisters to the MCInstrAnalysis
interface to help identify instructions that implicitly clear the upper portion
of a super-register.  The rest of the patch teaches llvm-mca how to use that new
method to obtain the information, and update the register dependencies

I compared the kernels from tests clear-super-register-1.s and
clear-super-register-2.s against the output from perf on btver2.  Previously
there was a large discrepancy between the estimated IPC and the measured IPC.
Now the differences are mostly in the noise.

Differential Revision: https://reviews.llvm.org/D48225

LLVM — lldb/trunk/include/lldb lldb-defines.h

Fix compilation with mingw-w64 (pr37873)

LLVM — cfe/trunk/lib/Basic/Targets SPIR.h, cfe/trunk/test/CodeGen spir-half-type.cpp

[SPIR] Prevent SPIR targets from using half conversion intrinsics

The SPIR target currently allows for half precision floating point types to be
emitted using the LLVM intrinsic functions which convert half types to floats
and doubles. However, this is illegal in SPIR as the only intrinsic allowed by
SPIR is memcpy, as per section 3 of the SPIR specification. Currently this is
leading to an assert being hit in the Clang CodeGen when attempting to emit a
constant or literal _Float16 type in a comparison operation on a SPIR or SPIR64
target. This assert stems from the CodeGen attempting to emit a constant half
value as an integer because the backend has specified that it is using these
half conversion intrinsics (which represents half as i16). This patch prevents
SPIR targets from using these intrinsics by overloading the responsible target
info method, marks SPIR targets as having a legal half type and provides
additional regression testing for the _Float16 type on SPIR targets.

Patch by: Stephen McGroarty

Differential Revision: https://reviews.llvm.org/D48188

LLVM — llvm/trunk/lib/Transforms/Vectorize SLPVectorizer.cpp

[SLPVectorizer] Split Tree/Reduction cost calls to simplify debugging. NFCI.

LLVM — llvm/trunk/tools/llvm-exegesis/lib MCInstrDescView.h MCInstrDescView.cpp

[llvm-exegesis] Remove noexcept in r335105.

gcc checks for transitivity (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53903)

LLVM — llvm/trunk/tools/llvm-exegesis/lib Uops.cpp Latency.cpp

[llvm-exegesis] Fix missing move in r335105.

LLVM — llvm/trunk/include/llvm/Support ConvertUTF.h Path.h

[Support] Add missing includes of <system_error> for std::error_code

This fixes compilation with MinGW after SVN r333798, which added
a few functions within _WIN32 ifdefs, functions returning
std::error_code. Include everything that is needed instead of
hoping that this header being inclued transitively (which it apparently
is in MSVC builds).

LLVM — lldb/trunk/source/API SBHostOS.cpp

Fix windows build broken by r335104

lldb-python.h needs to be included first to work around some
incompatibilities between windows and python headers.

LLVM — llvm/trunk/tools/llvm-exegesis/lib Uops.cpp Latency.cpp, llvm/trunk/unittests/tools/llvm-exegesis/X86 SnippetGeneratorTest.cpp

[llvm-exegesis] Use a Prototype to defer picking a value for free vars.

Summary: Introducing a Prototype object to capture Variables that must be set but keeps 
degrees of freedom as Invalid. This allows exploring non constraint variables later on.

Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48316

LLVM — lldb/trunk/include/lldb/Host/macosx HostInfoMacOSX.h, lldb/trunk/include/lldb/Host/posix HostInfoPosix.h

Remove dependency from Host to python

The only reason python was used in the Host module was to compute the
python path. I resolve this the same way as D47384 did for clang, by
moving the path computation into the python plugin and modifying
SBHostOS class to call into this module for ePathTypePythonDir.

Reviewers: zturner, jingham, davide

Subscribers: mgorny, lldb-commits

Differential Revision: https://reviews.llvm.org/D48215

LLVM — cfe/trunk/include/clang/Basic DiagnosticSemaKinds.td, cfe/trunk/lib/Sema SemaType.cpp

[Sema] Allow creating types with multiple of the same addrspace.

The comment with the OpenCL clause about this clearly
says: "No type shall be qualified by qualifiers for
two or more different address spaces."

This must mean that two or more qualifiers for the
_same_ address space is allowed. However, it is
likely unintended by the programmer, so emit a

For dependent address space types, reject them like
before since we cannot know what the address space
will be.

Patch by Bevin Hansson (ebevhan).

Reviewers: Anastasia

Reviewed By: Anastasia

Subscribers: bader, cfe-commits

Differential Revision: https://reviews.llvm.org/D47630

LLVM — lldb/trunk/include/lldb/Breakpoint BreakpointIDList.h, lldb/trunk/source/Breakpoint BreakpointIDList.cpp

BreakpointIDList: Use llvm::ArrayRef instead of pointer+length pair