LLVM/project 2c1c887llvm/lib/Target/RISCV RISCVInstrInfoVPseudos.td RISCVInstrInfo.cpp, llvm/test/CodeGen/RISCV/rvv commutable.ll

[RISCV] Make fixed-point instructions commutable (#90035)

This PR includes:
* vsadd.vv/vsaddu.vv
* vaadd.vv/vaaddu.vv
* vsmul.vv
DeltaFile
+173-0llvm/test/CodeGen/RISCV/rvv/commutable.ll
+16-13llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+5-0llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+194-133 files

LLVM/project 5df14c8llvm/lib/Target/RISCV RISCVInstrInfoVPseudos.td RISCVInstrInfo.cpp, llvm/test/CodeGen/RISCV/rvv commutable.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+173-0llvm/test/CodeGen/RISCV/rvv/commutable.ll
+16-13llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+5-0llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+194-133 files

LLVM/project 502cc68llvm/test/CodeGen/RISCV/rvv commutable.ll

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+175-0llvm/test/CodeGen/RISCV/rvv/commutable.ll
+175-01 files

LLVM/project c705c68llvm/lib/TargetParser RISCVISAInfo.cpp, llvm/test/TableGen riscv-target-def.td

[RISCV] Generate profiles from RISCVProfiles.td

So we can only mantain one place.

Reviewers: preames, yetingk, topperc

Reviewed By: topperc

Pull Request: https://github.com/llvm/llvm-project/pull/90187
DeltaFile
+29-11llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
+2-35llvm/lib/TargetParser/RISCVISAInfo.cpp
+20-0llvm/test/TableGen/riscv-target-def.td
+51-463 files

LLVM/project f86d264llvm/lib/Target/RISCV RISCVProfiles.td RISCV.td, llvm/test/CodeGen/RISCV attributes.ll

[RISCV] Add subtarget features for profiles

This may simplify the usage of tools like `opt`, `llc`, etc.

Reviewers: michaelmaitland, 4vtomat, preames, asb

Reviewed By: michaelmaitland, preames, 4vtomat

Pull Request: https://github.com/llvm/llvm-project/pull/84877
DeltaFile
+204-0llvm/lib/Target/RISCV/RISCVProfiles.td
+25-0llvm/test/CodeGen/RISCV/attributes.ll
+6-0llvm/lib/Target/RISCV/RISCV.td
+235-03 files

LLVM/project 0736f3allvm/test/CodeGen/RISCV half-round-conv-sat.ll, llvm/test/CodeGen/X86 combine-or-shuffle.ll combine-or.ll

Rebase and sync RISCVProfile definition

Created using spr 1.3.6-beta.1
DeltaFile
+513-513llvm/test/MC/RISCV/rvv/zvlsseg.s
+916-0llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
+862-0llvm/test/CodeGen/X86/combine-or-shuffle.ll
+857-0llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+312-336llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
+138-468llvm/test/CodeGen/X86/combine-or.ll
+3,598-1,317471 files not shown
+14,754-7,408477 files

LLVM/project f863584llvm/test/CodeGen/RISCV half-round-conv-sat.ll, llvm/test/CodeGen/X86 combine-or-shuffle.ll combine-or.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+513-513llvm/test/MC/RISCV/rvv/zvlsseg.s
+916-0llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
+862-0llvm/test/CodeGen/X86/combine-or-shuffle.ll
+857-0llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+312-336llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
+138-468llvm/test/CodeGen/X86/combine-or.ll
+3,598-1,317471 files not shown
+14,753-7,407477 files

LLVM/project 7037878llvm/test/TableGen riscv-target-def.td, llvm/utils/TableGen RISCVTargetDefEmitter.cpp

[RISCV][TableGen] Get right experimental extension name

We should remove the `experimental-` prefix when printing march
string.

We didn't meet this problem because there is no processor containing
experimental extensions.

Reviewers: fpetrogalli, asb, topperc

Reviewed By: topperc, asb

Pull Request: https://github.com/llvm/llvm-project/pull/90185
DeltaFile
+4-2llvm/test/TableGen/riscv-target-def.td
+1-1llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
+5-32 files

LLVM/project 679e99dllvm/utils/gn/secondary/llvm/lib/Target/WebAssembly BUILD.gn

[gn build] Port 1a462296360f
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn
+1-01 files

LLVM/project 1a46229lld/test/wasm init-fini.ll, llvm/lib/Target/WebAssembly WebAssemblyCleanCodeAfterTrap.cpp WebAssemblyTargetMachine.cpp

Revert "Revert "[WebAssembly] remove instruction after builtin trap" (#90354)" (#90366)

`llvm.trap` will be convert as unreachable which is terminator.
Instruction after terminator will cause validation failed.
This PR introduces a pass to clean instruction after terminator.
Fixes: https://github.com/llvm/llvm-project/issues/68770
Reapply: #90207
DeltaFile
+80-0llvm/lib/Target/WebAssembly/WebAssemblyCleanCodeAfterTrap.cpp
+6-6llvm/test/MC/WebAssembly/global-ctor-dtor.ll
+9-2llvm/test/CodeGen/WebAssembly/unreachable.ll
+4-0llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+2-0llvm/lib/Target/WebAssembly/WebAssembly.h
+1-1lld/test/wasm/init-fini.ll
+102-91 files not shown
+103-97 files

LLVM/project 8749040llvm/lib/Passes PassBuilderPipelines.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+8-1llvm/lib/Passes/PassBuilderPipelines.cpp
+8-11 files

LLVM/project ad1e10a.github CODEOWNERS

[github] Add ClangIR codeowners (#86089)

DeltaFile
+4-0.github/CODEOWNERS
+4-01 files

LLVM/project 53ff002clang/cmake/caches Release.cmake, llvm/utils/release test-release.sh

[CMake][Release] Enable CMAKE_POSITION_INDEPENDENT_CODE (#90139)

Set this in the cache file directly instead of via the test-release.sh
script so that the release builds can be reproduced with just the cache
file.
DeltaFile
+1-2llvm/utils/release/test-release.sh
+1-0clang/cmake/caches/Release.cmake
+2-22 files

LLVM/project b4af01bclang/lib/Format WhitespaceManager.cpp

[clang-format][NFC] Don't repeat Changes[i]/Changes[i - 1]
DeltaFile
+18-21clang/lib/Format/WhitespaceManager.cpp
+18-211 files

LLVM/project 6084dcbllvm/test/Transforms/LoopVectorize/AArch64 induction-costs-sve.ll conditional-branches-cost.ll

[LV] Add additional cost model coverage for loops with casted inds.

Add test coverage for cost-model code-paths not covered by current unit
tests in preparation for
 https://github.com/llvm/llvm-project/pull/67934.
DeltaFile
+916-0llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
+857-0llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+482-0llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
+341-0llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
+258-0llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
+2,854-05 files

LLVM/project 38a2051llvm/lib/Target/WebAssembly WebAssemblyCleanCodeAfterTrap.cpp WebAssemblyTargetMachine.cpp, llvm/test/CodeGen/WebAssembly unreachable.ll

Revert "[WebAssembly] remove instruction after builtin trap" (#90354)

Reverts llvm/llvm-project#90207

LLD Bots are broken.
DeltaFile
+0-80llvm/lib/Target/WebAssembly/WebAssemblyCleanCodeAfterTrap.cpp
+6-6llvm/test/MC/WebAssembly/global-ctor-dtor.ll
+2-9llvm/test/CodeGen/WebAssembly/unreachable.ll
+0-4llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+0-2llvm/lib/Target/WebAssembly/WebAssembly.h
+0-1llvm/lib/Target/WebAssembly/CMakeLists.txt
+8-1026 files

LLVM/project 0336328clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy][DOC] Minor fixes to release notes

Fix minor style problems in release notes.
DeltaFile
+14-12clang-tools-extra/docs/ReleaseNotes.rst
+14-121 files

LLVM/project 803cbcbclang-tools-extra/clang-tidy/modernize UseNullptrCheck.h, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Enable C23 support in modernize-use-nullptr (#89990)

C23 introduces the `nullptr` constant similar to C++11 which means that
the checker `modernize-use-nullptr` can be used on C23 code as well.

This PR enables the checker to be run on C23 and adds testcases.

See N3042:
https://open-std.org/JTC1/SC22/WG14/www/docs/n3042.htm
DeltaFile
+139-0clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr-c23.c
+4-0clang-tools-extra/docs/ReleaseNotes.rst
+1-1clang-tools-extra/clang-tidy/modernize/UseNullptrCheck.h
+1-1clang-tools-extra/docs/clang-tidy/checks/modernize/use-nullptr.rst
+1-1clang-tools-extra/test/clang-tidy/checkers/modernize/use-nullptr.c
+146-35 files

LLVM/project 738c135llvm/test/CodeGen/SystemZ atomic-store-08.ll atomic-load-08.ll

SystemZ: Add more tests for fp128 atomics (#90269)

These did not have proper floating point uses so weren't representative
samples. The bitcast inserted by lowering could be absorbed by the
load/store on the source/use.
DeltaFile
+49-2llvm/test/CodeGen/SystemZ/atomic-store-08.ll
+46-2llvm/test/CodeGen/SystemZ/atomic-load-08.ll
+42-0llvm/test/CodeGen/SystemZ/atomicrmw-xchg-07.ll
+137-43 files

LLVM/project 5b10a8dlibcxx/include/__format escaped_output_table.h, llvm/test/CodeGen/RISCV half-round-conv-sat.ll

cc1

Created using spr 1.3.5
DeltaFile
+3,617-0llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
+1,082-901libcxx/include/__format/escaped_output_table.h
+513-513llvm/test/MC/RISCV/rvv/zvlsseg.s
+862-0llvm/test/CodeGen/X86/combine-or-shuffle.ll
+312-336llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
+138-468llvm/test/CodeGen/X86/combine-or.ll
+6,524-2,218832 files not shown
+25,886-12,228838 files

LLVM/project 6c4b180libcxx/include/__format escaped_output_table.h, llvm/test/CodeGen/RISCV half-round-conv-sat.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+3,617-0llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
+1,082-901libcxx/include/__format/escaped_output_table.h
+513-513llvm/test/MC/RISCV/rvv/zvlsseg.s
+862-0llvm/test/CodeGen/X86/combine-or-shuffle.ll
+312-336llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
+138-468llvm/test/CodeGen/X86/combine-or.ll
+6,524-2,218832 files not shown
+25,885-12,227838 files

LLVM/project ff03f23llvm/lib/Target/WebAssembly WebAssemblyCleanCodeAfterTrap.cpp WebAssemblyTargetMachine.cpp, llvm/test/CodeGen/WebAssembly unreachable.ll

[WebAssembly] remove instruction after builtin trap (#90207)

`llvm.trap` will be convert as `unreachable` which is terminator.
Instruction after terminator will cause validation failed.
This PR introduces a pass to clean instruction after terminator.
Fixes: #68770.
DeltaFile
+80-0llvm/lib/Target/WebAssembly/WebAssemblyCleanCodeAfterTrap.cpp
+6-6llvm/test/MC/WebAssembly/global-ctor-dtor.ll
+9-2llvm/test/CodeGen/WebAssembly/unreachable.ll
+4-0llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+2-0llvm/lib/Target/WebAssembly/WebAssembly.h
+1-0llvm/lib/Target/WebAssembly/CMakeLists.txt
+102-86 files

LLVM/project 7b5b521llvm/lib/Transforms/Scalar DFAJumpThreading.cpp

[DFAJumpThreading][NFC] Use const reference as range variable (#90342)

Fixes #90286
DeltaFile
+1-1llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
+1-11 files

LLVM/project b5e8555llvm/lib/Transforms/Scalar MemCpyOptimizer.cpp

[MemCpyOpt][NFC] Format codebase (#90225)

This patch automatically formats the code.
DeltaFile
+62-57llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
+62-571 files

LLVM/project 9e30c96llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64ISelLowering.h, llvm/test/CodeGen/AArch64 fpmode.ll

[AArch64] Lowering of fpmode intrinsics in DAG (#80611)

LLVM intrinsics `get_fpmode`, `set_fpmode` and `reset_fpmode` operate
control modes, the bits of FP environment that affect FP operations. On
AArch64 these bits are in FPCR. The lowering implemented to produce code
close to that of GLIBC.
DeltaFile
+68-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+19-24llvm/test/CodeGen/AArch64/fpmode.ll
+6-0llvm/lib/Target/AArch64/AArch64ISelLowering.h
+93-243 files

LLVM/project b2c9f7dclang-tools-extra/clang-tidy/readability AvoidReturnWithVoidValueCheck.cpp

[clang-tidy] Ensure nullable variable is not accessed without validity test (#90173)

DeltaFile
+5-2clang-tools-extra/clang-tidy/readability/AvoidReturnWithVoidValueCheck.cpp
+5-21 files

LLVM/project c229f76llvm/lib/Transforms/Scalar DFAJumpThreading.cpp

[DFAJumpThreading] Avoid exploring the paths that never come back (#85505)

This patch does:
- Preserve loop info when unfolding selects.
- Reduce the search space for loop paths.
DeltaFile
+33-9llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
+33-91 files

LLVM/project 7152194llvm/lib/Target/Mips Mips32r6InstrInfo.td MipsISelLowering.cpp, llvm/test/CodeGen/Mips mipsr6-minmaxnum.ll

[MIPS] match llvm.{min,max}num with {min,max}.fmt for R6 (#89021)

- The behavior is similar to UCOMISD on x86, which is also used to
compare two fp values, specifically on handling of NaNs.
- Update related tests regarding this change.
- The further goal is to implement `llvm.minimum` and `llvm.maximum`
intrinsics for MIPS R6 and Pre-R6.

Part of https://github.com/llvm/llvm-project/issues/64207
DeltaFile
+301-186llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
+69-0llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll
+16-0llvm/lib/Target/Mips/Mips32r6InstrInfo.td
+9-0llvm/lib/Target/Mips/MipsISelLowering.cpp
+395-1864 files

LLVM/project 8400324libcxx/include/__algorithm find.h ranges_find.h, libcxx/include/__string char_traits.h

[libc++][NFC] Rename __find_impl to __find (#90163)

For most algorithms we've just added underscores to the detail function.
This changes `std::find` to match that pattern.
DeltaFile
+9-11libcxx/include/__algorithm/find.h
+2-2libcxx/include/__algorithm/ranges_find.h
+2-2libcxx/include/__string/char_traits.h
+13-153 files

LLVM/project 9bb84cellvm/include/llvm/ADT StringRef.h, llvm/unittests/ADT StringRefTest.cpp

[ADT] Add StringRef::{starts,ends}_with(char) (#90311)

This patch adds to StringRef the equivalent of
std::string_view::{starts,ends}_with(char) in C++20.
DeltaFile
+6-0llvm/include/llvm/ADT/StringRef.h
+4-0llvm/unittests/ADT/StringRefTest.cpp
+10-02 files